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18.30 - 23.00 | Pre-Workshop Dinner / Social Event |
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08.30 - 08.35 | Welcome and introduction |
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08.35 - 10.05 | Session 1: Compilation and optimization |
| Session Chair: Reinhard Wilhelm |
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08.35 - 09.05 |
Separate Compilation for Synchronous Programs
(abstract,
paper,
slides)
Jens Brandt, Klaus Schneider |
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09.05 - 09.35 |
Accelerating WCET-driven Optimizations by the Invariant Path Paradigm - a Case Study of Loop Unswitching
(abstract,
paper,
slides)
Paul Lokuciejewski, Fatih Gedikli, Peter Marwedel |
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09.35 - 10.05 |
Register Allocation Deconstructed
(abstract,
paper,
slides)
David Koes, Seth Goldstein |
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10.05 - 10.30 | Break |
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10.30 - 11.45 | Session 2: Keynote talk |
| The PROMPT Design Principles for Predictable Multi-Core Architectures (abstract) | ||
| Reinhard Wilhelm |
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11.45 - 12.00 | Discussion |
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12.00 - 13.00 | Lunch |
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13.00 - 14.30 | Session 3: Domain-specific languages |
| Session Chair: Marco Bekooij |
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13.00 - 13.30 |
Implementing AUTOSAR Scheduling and Resource Management on an Embedded SMT Processor
(abstract,
paper,
slides)
Florian Kluge, Chenglong Yu, Jörg Mische, Sascha Uhrig, Theo Ungerer |
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13.30 - 14.00 |
The Canals Language and its Compiler
(abstract,
paper,
slides)
Andreas Dahlin, Johan Ersfolk, Johan Lilius, Haitham Habli, Guifu Yang |
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14.00 - 14.30 |
A Design Flow Based on a Domain Specific Language to Concurrent Development of Device Drivers and Device Controller Simulation Models
(abstract,
paper,
slides)
Edson Lisboa, Luciano Silva, Igino Chaves, Thiago Lima, Edna Barros |
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14.30 - 15.00 | Break |
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15.00 - 16.00 | Session 4: Validation and verification |
| Session Chair: Trevor Carlson |
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15.00 - 15.30 |
Certifying Deadlock-freedom for BIP Models
(abstract,
paper,
slides)
Jan Olaf Blech, Michael Perin |
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15.30 - 16.00 |
Precise Simulation of Interrupts using a Rollback Mechanism
(abstract,
paper,
slides)
Florian Brandner |
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16.00 - 16.20 | Discussion |
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16.20 - 16.30 | Closing |
| Last Update: June 23, 2009 |