SCOPES 2015: Program

Monday June 1st, 2015


12.00 - 13.15 Lunch


13.15 - 13.30 Opening

Henk Corporaal


13.30 - 14.30 Keynote 1: Computation in Memory for Data-Intensive Applications: Beyond CMOS and beyond Von-Neumann

Said Hamdioui


14.30 - 15.00 Coffee Break


15.00 - 16.30 Session 1: Compiler optimizations

15.00 Use of Previously Acquired Positioning of Optimizations for Phase Ordering Exploration

Ricardo Nobre, Luiz Martins and João Cardoso (Full Paper)

15.30 Schedulability Aware WCET-Optimization of Periodic Preemptive Hard Real-Time Multitasking Systems

Arno Luppold and Heiko Falk (Research Presentation)

16.00 An energy efficient message passing synchronization algorithm for concurrent data structures in embedded systems

Lazaros Papadopoulos and Dimitrios Soudris (Research Presentation)


16.30 - 17.00 Coffee Break


17.00 - 18.30 Session 2: Dataflow Scheduling and Mapping

17.00 Utilization Improvement by Enforcing Mutual Exclusive Task Execution in Modal Stream Processing Applications

Guus Kuiper, Stefan Geuns and Marco Bekooij (Full Paper)

17.30 Throughput-optimizing Compilation of Dataflow Applications for Multi-Cores using Quasi-Static Scheduling

Tobias Schwarzer, Joachim Falk, Michael Glaß, Jürgen Teich, Christian Zebelein and Christian Haubelt (Full Paper, slides)

18.00 Fast Crown Scheduling Heuristics for Energy-Efficient Mapping and Scaling of Moldable Streaming Tasks on Many-Core Systems -- extended abstract

Nicolas Melot, Christoph Kessler, Jörg Keller and Patrick Eitschberger (Research Presentation)


20.00 - 23.00 Workshop Diner


Tuesday June 2nd, 2015


8.30 - 10.30 Session 3: System-level Design

8.30 Is dynamic compilation possible for embedded system?

Henry-Pierre Charles and Victor Lomuller (Research Presentation, slides)

9.00 Modeling Complex Cyber-Physical Systems using Dataflow

Joao Bastos (Research Presentation)

9.30 Modeling Exclusive Memory Access for a Time-Decoupled Parallel SystemC Simulator

Jan Henrik Weinstock, Rainer Leupers and Gerd Ascheid (Research Presentation, slides)

10.30 Plasmon-based Virus Detection on Heterogeneous Embedded Systems

Olaf Neugebauer, Pascal Libuschewski, Michael Engel, Heinrich Mueller and Peter Marwedel (Full Paper)


10.30 - 11.00 Coffee Break


11.00 - 12.00 Keynote 2: Adaptive Isolation for Predictable MPSoC Stream Processing

Jürgen Teich


12.00 - 13.00 Lunch


13.00 - 14.30 Session 4: Run-time optimizations

13.00 Programming Strategies for Contextual Runtime Specialization

Tiago Carvalho, Pedro Pinto and Joao Cardoso (Full Paper, slides)

13.30 Runtime Adaptation of Application Execution under Thermal and Power Constraints in

Massively Parallel

Éricles Sousa, Frank Hannig, Jürgen Teich, Qingqing Chen and Ulf Schlichtmann (Research Presentation, slides)

14.00 Reactive Nano-Kernels: Exploring the Limits of Power and Energy Efficiency in Deeply Embedded Systems

Mariusz Ryndzionek and Bartosz Ziółek (Research Presentation)


14.30 - 15.00 Coffee break



15.00 - 16.30 Session 5: Compiler optimizations

15.00 Static energy consumption analysis of LLVM IR programs

Neville Grech, Kyriakos Georgiou, James Pallister, Steve Kerrison, Jeremy Morse and Kerstin Eder (Full Paper)

15.30 High-level software-pipelining in LLVM

Roel Jordans and Henk Corporaal (Research Presentation, slides)

16.00 Bytewise Register Allocation

Philipp Klaus Krause (Full Paper, slides)


16.30 - 17.00 Coffee break


17.00 - 19.00 Session 6: High-level compilation

17.00 Efficient Compilation of Stream Programs for Heterogeneous Architectures: A Model-Checking based approach

Rajesh Thakur and Y.N. Srikant (Full Paper, slides)

17.30 Parallelism Extraction from Embedded Software for Multicore DSP Platforms

Miguel Angel Aguilar, Rainer Leupers and Gerd Ascheid (Research Presentation)

18.00 A Concept of Vector Clock Utilization in an Iterative Tracing Approach for Distributed Embedded Systems

Robert Hoettger and Burkhard Igel (Research Presentation)

18.30 A framework for optimizing OpenVX applications performance on embedded manycore accelerator

Giuseppe Tagliavini, Germain Haugou, Andrea Marongiu, Luca Benini (Research Presentation, slides)


Wednesday June 3th, 2015


9.00 - 10.00 Session 7: Compiler optimizations

9.00 PSLP: Padded SLP Automatic Vectorization

Vasileios Porpodas (Research Presentation, slides)

9.30 The tree-width of C

Philipp Klaus Krause and Lukas Larisch (Research Presentation, slides)


10.00 - 10.30 Coffee break


10.30 - 11.30 Session 8: System-level Modeling and Verification

10.30 A model-based, single-source approach to system modeling, verification and synthesis

Eugenio Villar (Research Presentation, slides)

11.00 Modular translation validation of a full-sized synchronous compiler using off-the-shelf verification

Van-Chan Ngo, Jean-Pierre Talpin, Thierry Gautier, Loic Besnard and Paul Le Guernic (Research Presentation)


11.30 - 12.30 Session 9: Application specific hardware design

11.30 Application-Specific Architecture Exploration Based on Processor-Agnostic Performance Estimation

Juan Eusse (Research Presentation)

12.00 VLIW Code Generation for a Convolutional Network Accelerator

Maurice Peemen, Wisnu Pramadi, Bart Mesman, and Henk Corporaal (Research Presentation)


12.30 - 13.00 Best presentation award ceremony / Closing remarks


13.00 - 14.00 Lunch